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| An AMD Epyc server processor seated in its socket. |
Newly leaked slides suggest AMD is preparing a server platform that could redefine what mainstream core counts look like—and workstation, HEDT, and even laptop users stand to benefit.
Just a few years ago, the idea of a single server CPU packing nearly 300 cores would have sounded like science fiction. But if the latest batch of leaked documents is anything to go by, AMD’s next-generation Zen 7 architecture is poised to make that a reality before the end of the decade. And the trickle-down effects for high-end desktop (HEDT) users, content creators, and even thin-and-light laptop owners could be nothing short of transformative.
The information comes courtesy of known hardware leaker Tom, host of the Moore’s Law Is Dead YouTube channel, who shared a set of alleged internal AMD slides. The centerpiece of the leak is Florence—the codename for AMD’s Zen 7-based EPYC flagship—a processor that reportedly relies on an intricate chiplet design to push core counts into uncharted territory.
Florence: Two I/O Dies, Two Memory Dies, and Eight Compute Chiplets
According to the slides, Florence is built around a complex multi-die architecture. The platform uses two “Dwarka” I/O dies and two “Mathura” memory dies—both named after ancient Indian cities of considerable historical and spiritual importance. These are paired with up to eight Steamboat CCDs (Core Compute Dies), each containing 36 Zen 7 cores. Do the math: that yields 288 cores per socket, with dual-socket configurations potentially hitting 576 cores per server node.
Each Steamboat CCD is itself a marvel of packaging technology. The leak describes a Zen 7 core die manufactured on TSMC’s A14 node (likely a 14Å-class process, roughly equivalent to 1.4nm-class), paired with a separate L3 cache chiplet on N4P (4nm). Interestingly, the cache chiplet is stacked underneath the core die rather than on top—a reversal of the current 3D V-Cache approach. The slides list 7 MB of L3 cache per core, meaning a full 36-core CCD would pack 252 MB of L3, and an eight-CCD Florence chip would boast over 2 GB of L3 cache.
Other key specifications include:
- PCIe 6.0 + CXL 3.2 interface
- xGMI4-80G link speed
- TDP up to 600W (not surprising given the core count and clock speed ambitions)
A Roadmap to 2028 and Beyond
The leaked AMD server roadmap shows a clear progression. Venice-SP7 (Zen 6, 256 cores) is expected to transition to Florence-SP7 (Zen 7, 288 cores) by late 2028. A PCIe Gen 7 platform is hinted at for 2029, possibly arriving as a mid-generation refresh on a new socket.
Both the Dwarka I/O die and the Mathura memory die are indicated to use TSMC’s N3C process (3nm-class). One slide shows an A0 tape-out scheduled for October 2026, with production targeted for mid-2028 and a launch around the end of that year.
The Surprising Backward Compatibility
Existing AMD platform owners may not have to tear out their motherboards to enjoy the next architectural leap. According to the leak, Zen 7 CCDs are backwards compatible with previous-generation Kedar and Weisshorn I/O dies. Meanwhile, Silverton CCDs (likely a different variant) will work with Badri, Kedar, Puri, and Dwarka IODs across SP7 and SP8 packaging, with support for 2, 4, 6, or 8 CCDs per socket.
Importantly, Threadripper and HEDT support via the Dwarka IOD is explicitly called out. That means AMD hasn’t forgotten about workstation users who need massive core counts for rendering, simulation, or compiling.
For a deeper dive into these slides and Tom’s expert analysis, watch his full breakdown here:
Moore’s Law Is Dead – AMD Zen 7 Florence Leak Deep Dive
Laptop Users Could See Some of the Biggest Gains
While 288-core server chips grab headlines, the leak also contains tantalizing details for mobile users. A separate performance table for consumer-oriented Silverton and Silverking chiplets lists impressive per-core efficiency gains:
- 16–20% uplift at sub-9W server workloads
- 30–36% improvement in 3W/core client APU scenarios
That second figure is particularly striking. Thin-and-light laptops often run at very low power per core to manage thermals and battery life. A 30%+ performance gain at those power levels would make Zen 7-based laptops feel snappier and more responsive than anything available today, without sacrificing all-day battery life.
Could We See a 72-Core Desktop Chip?
The leak has also sparked speculation about a potential Ryzen desktop monster. Tom notes that the 36-core Steamboat CCD is similar in width to the 16-core Silverton CCD. In theory, that could allow AMD to fit two Steamboats on an AM5 socket for a 72-core desktop chip.
However, no leaked slide confirms such a product, and Tom himself suggests that any such part would more likely target embedded customers than the DIY enthusiast market. Still, the mere possibility will set forums ablaze—imagine a 72-core Ryzen 9 with 504 MB of L3 cache. Even if it never materializes for consumers, the fact that the building blocks exist shows how far AMD’s chiplet strategy has come.
What About PCIe Gen 7?
The roadmap entry pointing to a PCIe Gen 7 platform around 2029 is worth watching. Gen 7 doubles the bandwidth of PCIe 6.0 (already double Gen 5), which would be a boon for data centers running AI accelerators, high-speed networking, and storage. For workstations, it would mean blistering-fast GPU and SSD connectivity. However, don’t expect to see it on the first Florence chips—those are pegged for PCIe 6 + CXL 3.2, which is still a massive upgrade over today’s Gen 5 platforms.
The Bottom Line
If these leaks hold water, AMD is on track to deliver a Zen 7 generation that pushes core counts, cache capacity, and efficiency to levels that would have seemed absurd just a few years ago. The 288-core Florence EPYC will likely dominate cloud and enterprise workloads, while the efficiency gains at low power could make next-generation laptops genuinely exciting.
For workstation and HEDT users, the explicit mention of Threadripper support via the Dwarka IOD suggests that AMD sees value in bringing server-class core counts down to the prosumer level. And while a 72-core AM5 chip remains speculative, the fact that it’s even theoretically possible tells you everything you need to know about the flexibility of AMD’s chiplet ecosystem.
As always with leaks, treat everything with healthy skepticism until official announcements arrive. But given Moore’s Law Is Dead’s track record with AMD roadmaps, there’s reason to believe that Florence, Dwarka, and Steamboat are very real—and they’re coming by late 2028.
Source: Moore’s Law Is Dead via YouTube
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| Moore's Law Is Dead's summary of the leaked AMD Zen 7 Florence and Grimlock details, covering Epyc core counts, desktop chiplet configurations, and mobile performance uplift estimates. |
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| A leaked AMD server roadmap showing Venice-SP7 (Zen 6, 256 cores) transitioning to Florence-SP7 (Zen 7, 288 cores) by late 2028, with a PCIe Gen 7 platform hinted at for 2029. |